1. Field Of The Invention
The present invention relates to integrated circuit technology, more particularly, to amplifier/driver circuits using CMOS technology whose outputs may be placed in a floating or high impedance state.
2. The Prior Art
In many applications, it is desirable or necessary to disable the output stage of an amplifier, line driver, or logic gate, leaving the output in a high inpedance state. The output may then be driven by another source.
With conventional junction-isolated CMOS circuits, the implementation of such so-called "three-state" outputs is common and may be straightforwardly implemented, with the restriction that the output node or terminal cannot be driven more than a diode-drop voltage above the positive supply voltage or below the negative supply voltage. If either of these conditions occurs with conventional three-state circuits using junction-isolated CMOS technology, the parasitic PN diodes inherent in CMOS devices become forward biased and act to clamp the output to the power supply voltage. Under these conditions, the current flowing through these parasitic diodes can easily be enough to destroy them and the CMOS circuit with which they are associated. In addition, the forward biasing of these parasitic diodes also injects minority carriers into the semiconductor substrate. These minority carriers can trigger the well-known latch-up phenomenon, a common potential problem in CMOS technology.
There are applications which require of the CMOS three-state output circuit the ability to be driven beyond the voltage levels of the power supply which maintains the high impedance at the output. There is thus a need for a circuit which can withstand such conditions without forward biasing any CMOS PN junctions in the output circuit. This is especially important in applications where line driver outputs are used in a "wired-or" configuration with other drivers which may be operating with different power supply voltages and/or no power supplies.